How does a spiking network reach single-digit word error rates without matrix multiplications?

Spiking neural networks have long promised energy savings through sparse, event-driven computation. Continuous tasks such as automatic speech recognition have remained a weak spot.

The bottleneck is the leaky integrate-and-fire neuron. Its membrane decay erases information across pauses and phonetic boundaries while the same unit must both extract features and retain long-range context. The paper identifies this dual burden as the core reason SNNs fall short on ASR.

A cortical division of labor

Biology solves the problem by separating nonlinear filtering in dendrites from somatic integration. The authors mirror this division in a module they call the Spiking Ternary GRU, or stGRU. A ternary-weight gated recurrent unit performs temporal filtering. Downstream resonate-and-fire neurons then generate the binary spike stream that drives the next block's event pathway. Binary event transmission becomes a native training constraint rather than a separate deployment-time activation quantization step. Together with ternary weights, learned projections avoid dense floating-point matrix multiply-accumulate operations entirely. The network contains no learned ANN sequence decoder.

Benchmark results

Three model sizes were trained end-to-end on LibriSpeech-960. Small and Medium stGRUs reach 8.09% and 7.04% WER on test-clean. The Large variant reaches $6.44 \pm 0.17%$ WER. No external language model is used. To the authors' knowledge these are the first matrix-MAC-free spiking networks to achieve single-digit WER on LibriSpeech. The architecture also achieves 10.88% test CER on Aishell-1 (9.28% on dev) when trained from scratch.

What the trained network reveals

Trained networks develop a depth-graded hierarchy without explicit supervision. Shallow layers act as fast acoustic filters. Deep layers form slower semantic integrators whose latent representations segregate into part-of-speech manifolds and word-level spike events. Deep-layer firing rates follow lognormal distributions with a sparsity gradient. This pattern mirrors hierarchical processing observed in human cortex in vivo. The paper treats this correspondence as evidence that the architectural inductive bias is biologically grounded.

Compute and memory implications

Because the forward pass uses only ternary weights and binary spikes, the modeled compute and memory cost is favorable compared to dense floating-point baselines. The paper does not report wall-clock latency or hardware measurements on neuromorphic chips. It also does not state how many parameters each model size contains. The submission is 22 pages with 6 figures. It was posted on 21 Oct 2026 by four authors: Pavlos Poulos, Katelyn Sadorf, Themos Stafylakis, and Costas A. Anastassiou.